:: azealon consulting ::

What technology areas can 'azealon' provide passionate teams with?

'azealon' has robust, deep connections within the industry and can bring in the "specialists" that a customer would need in-time and help ramp-up, ramp-down teams quickly. The tools and technologies listed below are predominant areas in which we are confident of building world-class product teams. We are open to new practice areas or niche area engagements.

Application Software

Open Source Technologies

User Interface: Struts, JSF, Cocoon

Middleware: Apache, Tomcat, JBoss, Resin

Databases: MySQL

Operating Systems: Red Hat Linux, Solaris

Web: LAMP(Linux, Apache, MySQL, PHP/Perl/Python)
Build Tools: Ant, Maven

Java Technologies

Application Servers: BEA Weblogic, IBM Websphere, JBoss, Tomcat, Resin

EJB, JMS, CORBA, RMI, XML, AJAX

J2ME(MIDP, CLDC, CDC, Emulators)

Swing, Eclipse SWT Plugins

JDBC, Hibernate, iBatis

Eclipse, NetBeans, IntelliJIdea

JAAS,JCE, Kerberos and related Security Technologies

Microsoft Technologies

User Interface: ASP.NET

Middleware: .NET, COM and COM+

Databases: SQL Server 7.0

Operating Systems: Windows XP, Vista

Embedded Systems and Software

Embedded Hardware Services

Microprocessor based systems design: Intel, Motorola, Mips

Embedded systems design based on microcontrollers: Intel, Motorola, Hitachi range of microcontrollers

DSP based embedded systems design: TI - 320C5x ) and ADSP 2100 Families

LCD panels, Touch screen designs

Communication: Computer Telephony Interface ( CTI ), Ethernet, Asynchronous, Synchronous

Serial Bus Interfaces: USB

Adapter cards and peripheral controller cards(ISA, PCI, PCMCIA bus based cards)

Embedded Software Services

C, C++,Assembly Language

RTOS: VxWorks, QNX, RT-Linux

Device Drivers for Windows and Linux platforms, Graphic Libraries for LCD panels

Microprocessor: Intel 80x86, mips 3000

MicroController( 8051, 80196 and 6805 )

Software on DSP's from TI and AD

SoC (System on Chip) Design Capabilities

Design

Architecture Finalization

RTL Design

Simulation

Linting

Verfication

Expertise in HDLs and HVLs

Full Chip and Unit Level Verification

Automated Test Benches and Regression Environment

Development of regression suites in Specman Elite, C/C++, Vera, System Verilog, SystemC

Implementation

Synthesis

Static Timing Analysis

Formal Verification

Linting

Power Analysis

Netlist2GDSII

DFT ( Design for Test)

Physical Design

Turnkey RTL/Netlist to GDSII

Part projects

Process migration

Feature Reduction

Area Shrink

Chip Sustenance

FPGA Capabilities
.

Complete lifecycle development
(Specification ' Architecture ' Design Entry ' Simulation ' Synthesis ' Floor Planning ' Place & Route ' Bit File Generation ' Downloading)

FPGA prototyping

FPGA-to-ASIC conversion